Abstract

A highly power-efficient silicon (Si) photonic PAM4 transmitter was developed by integrating a Si segmented Mach–Zehnder modulator and a CMOS driver chip. Si p-i-n-type phase shifters are directly driven with a CMOS inverter driver array to realize a low power operation. A passive RC equalizing technique was adopted to extend the modulation bandwidth up to 20 GHz while maintaining a low power consumption. By integrating a passive RC filter within the photonics chip, we achieved a very compact foot print for the transmitter (450 × 950 μm). The fabricated modulator exhibited a low VπL of 0.19 V·cm and a moderate insertion loss of 23.7 dB/cm. The transmitter successfully demonstrated clear eye openings of PAM4 signal up to 56 Gbps together with a record-high-efficiency of 1.59 mW/Gbps. A low bit-error-rate below KP4 FEC limit ( $ <{\text{2.0}}\times {\text{10}}^{-4}$ ) was also confirmed at 50-Gbps PAM4 operation even with an unequalized receiver.

© 2018 OAPA

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