Abstract

This paper presents a link analysis for optical interconnects based on CMOS scaling toward FinFET devices. An on-chip wavelength division multiplexing (WDM) link is modeled assuming silicon photonic ring modulators, WDM multiplexers and demultiplexers, and photodetectors. A high-speed CMOS transceiver is designed and evaluated using 28-nm FD-SOI and 14-nm FinFET processes. Compared to 28-nm FD-SOI, the 14-nm FinFET offers higher intrinsic gain and allows for 50% higher transconductance per drain current suggesting more energy-efficient circuit design. Cosimulation of the photonic and electronic devices demonstrates an optimum energy efficiency of $\sim 2\, \text{pJ/b}$ at $25\, \text{Gb/s}$ for a bit-error rate of $10^{-12}$ including laser and ring tuning power.

© 2016 IEEE

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