Abstract
On-chip 1-D photonic crystal nanocavities were designed and fabricated in a 300 mm
silicon-on-insulator wafer using a CMOS-compatible process with 193 nm immersion lithography and silicon oxide
planarization. High quality factors up to 10
$^{5}$
were achieved.
By changing geometrical parameters of the cavities, we also demonstrated a wide range of wavelength tunability for the
cavity mode, a low insertion loss and excellent agreement with simulation results. These on-chip nanocavities with
high quality factors and low modal volume, fabricated through a high-resolution and high-volume CMOS compatible
platform open up new opportunities for the photonic integration community.
© 2014 IEEE
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